AD9204BCPZ-80

AD9204 is a monolithic, dual-channel, 80MSPS ADC. It features high performance sample-and hold circuit and on-chip voltage reference. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the SPI. A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. Typical applications include communications, diversity radio systems, multimode digital receivers (GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA), I/Q demodulation systems, smart antenna systems, battery-powered instruments, handheld scope meters, ultrasound, Radar/LIDAR and PET/SPECT imaging.

• 1.8V analogue supply operation and 1.8V to 3.3V output supply
• SNR of 61.3dBFS at 9.7MHz input and 61dBFS at 200MHz input
• SFDR of 75dBc at 9.7MHz input and 73dBc at 200MHz input
• 37mW standby power and 2.2mW power-down power
• Differential input with 700MHz bandwidth
• On-chip voltage reference and sample-and-hold circuit
• Scalable analogue input of 1V p-p to 2V p-p differential and optional clock duty cycle stabilizer
• Offset binary, grey code, or twos complement data format and energy-saving power-down modes
• Integer 1-to-8 input clock divider and data clock out with programmable clock and data
• 64 lead LFCSP-EP package, operating temperature range from -40°C to 85°C

Notes

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party